Hallo MacSchrauber,
War in der Vergangenheit schon fleißig am mitlesen hier und bei MR und hab dann nach dem Update auf MacOs 12.3 (OC ist aktiv) entschlossen mich um mein Bootrom zu „kümmern“!
Besitze einen MacPro DualProz mit einem Crossflashs 4.1->5.1.
Hab auch schon einen Dump mithilfe von deinem Tool gemacht.
Finde es toll wieviel Mühe du in die Sache gesteckt hast und dein Wissen Leuten wie mir zur Verfügung stellst und deine Hilfe anbietest. Vielen Dank erstmal dafür!
Nachdem ich eine GC manuell angestoßen habe, waren zuerst ca 30000 Bytes frei, nach 2 mal Booten hab ich jetzt noch 11200 frei.
serial from firmware: 3T92
Firmware 144.0.0.0 (latest)
Crossflash 4.1->5.1
18 Memory Configs (ok)
0 xml (ok)
0 iCloud Tokkens (ok)
0 Microsoft Certificates (ok)
1 BluetoothActiveControllerInfos (ok)
1 BluetoothInternalControllerInfos (ok)
2 current-network (not ok)
12 AAPL Path Properties (ok)
VSS2 is empty (ok after triple nvram reset or recent firmware rebuilt)
11200 Bytes free space of 65472
flashrom v0.9.7-r1711 on Darwin 21.4.0 (x86_64)
flashrom was built with libpci 3.2.0, LLVM Clang 4.2 (clang-425.0.28), little endian
Command line (8 args): /Users/tom/Desktop/Mac Tools/MacSchrauber/RomDump Macschrauber.app/Contents/Resources/flashrom097r1711 -p internal -c SST25VF032B -r /Users/tom/downloads/3T9xxxxxB9MD_9999.0.0.0.0_SST25VF032B_20.03.2022_18-21-48.bin -o /Users/tom/downloads/3T9xxxxxB9MD_SST25VF032B_20.03.2022_18-21-48.log
Calibrating delay loop... OS timer resolution is 1 usecs, 490M loops per second, 10 myus = 10 us, 100 myus = 94 us, 1000 myus = 1017 us, 10000 myus = 10061 us, 4 myus = 3 us, OK.
Initializing internal programmer
Mapping low megabyte at 0x0000000000000400, unaligned size 0xffc00.
Mapping low megabyte, 0xffc00 bytes at unaligned 0x0000000000000400.
No coreboot table found.
dmidecode execution unsuccessful - continuing without DMI info
Found chipset "Intel ICH10" with PCI ID 8086:3a18. Enabling flash write...
0xfff80000/0xffb80000 FWH IDSEL: 0x0
0xfff00000/0xffb00000 FWH IDSEL: 0x0
0xffe80000/0xffa80000 FWH IDSEL: 0x0
0xffe00000/0xffa00000 FWH IDSEL: 0x0
0xffd80000/0xff980000 FWH IDSEL: 0x0
0xffd00000/0xff900000 FWH IDSEL: 0x0
0xffc80000/0xff880000 FWH IDSEL: 0x0
0xffc00000/0xff800000 FWH IDSEL: 0x0
0xff700000/0xff300000 FWH IDSEL: 0x4
0xff600000/0xff200000 FWH IDSEL: 0x5
0xff500000/0xff100000 FWH IDSEL: 0x6
0xff400000/0xff000000 FWH IDSEL: 0x7
0xfff80000/0xffb80000 FWH decode enabled
0xfff00000/0xffb00000 FWH decode enabled
0xffe80000/0xffa80000 FWH decode enabled
0xffe00000/0xffa00000 FWH decode enabled
0xffd80000/0xff980000 FWH decode enabled
0xffd00000/0xff900000 FWH decode enabled
0xffc80000/0xff880000 FWH decode enabled
0xffc00000/0xff800000 FWH decode enabled
0xff700000/0xff300000 FWH decode disabled
0xff600000/0xff200000 FWH decode disabled
0xff500000/0xff100000 FWH decode disabled
0xff400000/0xff000000 FWH decode disabled
Maximum FWH chip size: 0x400000 bytes
BIOS_CNTL = 0x01: BIOS Lock Enable: disabled, BIOS Write Enable: enabled
Root Complex Register Block address = 0xfed1c000
GCS = 0xd60461: BIOS Interface Lock-Down: enabled, Boot BIOS Straps: 0x1 (SPI)
Top Swap : not enabled
SPIBAR = 0xfed1c000 + 0x3800
0x04: 0xa008 (HSFS)
HSFS: FDONE=0, FCERR=0, AEL=0, BERASE=1, SCIP=0, FDOPSS=1, FDV=0, FLOCKDN=1
Warning: SPI Configuration Lockdown activated.
Reading OPCODES... done
OP Type Pre-OP
op[0]: 0x9f, read w/o addr, none
op[1]: 0xab, read w/ addr, none
op[2]: 0x01, write w/o addr, none
op[3]: 0x02, write w/ addr, none
op[4]: 0x03, read w/ addr, none
op[5]: 0xd8, write w/ addr, none
op[6]: 0x05, read w/o addr, none
op[7]: 0x20, write w/ addr, none
Pre-OP 0: 0x06, Pre-OP 1: 0x50
0x08: 0x00000000 (FADDR)
0x74: 0x811f0000 PR0: Warning: 0x00000000-0x0011ffff is read-only.
0x78: 0x9fff0150 PR1: Warning: 0x00150000-0x01ffffff is read-only.
0x7C: 0x00000000 (PR2 is unused)
0x80: 0x00000000 (PR3 is unused)
0x84: 0x00000000 (PR4 is unused)
Writes have been disabled for safety reasons. You can enforce write
support with the ich_spi_force programmer option, but you will most likely
harm your hardware! If you force flashrom you will get no support if
something breaks. On a few mainboards it is possible to enable write
access by setting a jumper (see its documentation or the board itself).
0x90: 0x04 (SSFS)
SSFS: SCIP=0, FDONE=1, FCERR=0, AEL=0
0x91: 0x014060 (SSFC)
SSFC: SCGO=0, ACS=0, SPOP=0, COP=6, DBC=0, SME=0, SCF=1
0x94: 0x5006 (PREOP)
0x96: 0xced8 (OPTYPE)
0x98: 0x0201ab9f (OPMENU)
0x9C: 0x2005d803 (OPMENU+4)
0xA0: 0x00000000 (BBAR)
SPI Read Configuration: prefetching disabled, caching enabled, OK.
The following protocols are supported: FWH, SPI.
Probing for SST SST25VF032B, 4096 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a
Found SST flash chip "SST25VF032B" (4096 kB, SPI) at physical address 0xffc00000.
Chip status register is 0x1c.
Chip status register: Block Protect Write Disable (BPL) is not set
Chip status register: Auto Address Increment Programming (AAI) is not set
Chip status register: Block Protect 3 (BP3) is not set
Chip status register: Block Protect 2 (BP2) is set
Chip status register: Block Protect 1 (BP1) is set
Chip status register: Block Protect 0 (BP0) is set
Chip status register: Write Enable Latch (WEL) is not set
Chip status register: Write In Progress (WIP/BUSY) is not set
Some block protection in effect, disabling... disabled.
Reading flash... done.
Restoring MMIO space at 0x10e8be8a0
Restoring PCI config space for 00:1f:0 reg 0xdc
Kannst du mir evtl ein leeres Bootrom mit aktuellem Bootloader zur verfügung stellen, das ich dann flashen kann?