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The 68040 was the first 680x0 family member with an on-chip Floating-Point Unit (FPU). It thus included all of the functionality that previously required external chips, namely the FPU and Memory Management Unit (MMU), which was added in the 68030. It also had split instruction and data caches of 4 kilobytes each. It was fully pipelined, with six stages.
Unfortunately, the 68040 ran into the transistor budget limit early in design. While the MMU did not take many transistors—indeed, having it on the same die as the CPU actually saved on transistors—the FPU certainly did. Motorola's 68882 external FPU was known as a very high performance unit and Motorola did not wish to risk integrators using the "LC" version with a 68882 instead of the more profitable full "RC" unit. (For information on Motorola's multiprocessing model with the 680x0 series, see Motorola 68020.) The FPU in the 68040 was thus made incapable of IEEE transcendental functions, which had been supported by both the 68881 and 68882 and were used by the popular fractal generating software of the time and little else. The Motorola floating point support package (FPSP) emulated these instructions in software under interrupt. As this was an exception handler, heavy use of the transcendental functions caused severe performance penalties.
The 68040 was the first 680x0 family member with an on-chip Floating-Point Unit (FPU). It thus included all of the functionality that previously required external chips, namely the FPU and Memory Management Unit (MMU), which was added in the 68030. It also had split instruction and data caches of 4 kilobytes each. It was fully pipelined, with six stages.
Unfortunately, the 68040 ran into the transistor budget limit early in design. While the MMU did not take many transistors—indeed, having it on the same die as the CPU actually saved on transistors—the FPU certainly did. Motorola's 68882 external FPU was known as a very high performance unit and Motorola did not wish to risk integrators using the "LC" version with a 68882 instead of the more profitable full "RC" unit. (For information on Motorola's multiprocessing model with the 680x0 series, see Motorola 68020.) The FPU in the 68040 was thus made incapable of IEEE transcendental functions, which had been supported by both the 68881 and 68882 and were used by the popular fractal generating software of the time and little else. The Motorola floating point support package (FPSP) emulated these instructions in software under interrupt. As this was an exception handler, heavy use of the transcendental functions caused severe performance penalties.